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ASIC Development Engineer – Digital IC Design

Bosch Group · Erlangen

🇬🇧 English
Digital ASIC development ATPG Coverage analysis Failure analysis Digital verification Interface validation Python Tcl Digital signal processing

Stellenbeschreibung

About the role

As an ASIC Development Engineer focusing on Digital IC Design, you will lead the digital design and ATPG (Automatic Test Pattern Generation) activities for automotive semiconductor projects. You will ensure robust implementations, high test quality, and drive technical excellence across the ASIC lifecycle.

Key responsibilities

  • Provide technical leadership for the digital design domain in ASIC projects, coordinating specifications, development, and integration with all stakeholders.
  • Plan, manage, and coordinate ATPG activities to meet coverage targets and define a robust test strategy in collaboration with design and test engineering.
  • Analyze test patterns, silicon data, and defect signatures to identify root causes and implement corrective actions.
  • Maintain and continuously improve the ATPG flow, integrating new tools and methodologies.
  • Develop and optimise automation solutions (Python, Tcl, Shell) to increase efficiency and standardisation, while aligning internal teams and external partners.

Required profile

  • Completed university studies in electrical engineering, computer science or a comparable field.
  • Several years of experience in digital ASIC development, top‑level integration, and preferably as a Digital Lead.
  • Strong expertise in ATPG, test methodologies, coverage analysis and related tools.
  • Experience in failure analysis using test patterns and silicon data.
  • Solid understanding of digital verification and interface validation.
  • Business‑fluent written and spoken English.

Required skills

  • Digital ASIC development
  • ATPG and test methodology
  • Coverage analysis
  • Failure analysis
  • Digital verification & interface validation
  • Python scripting
  • Tcl scripting
  • Shell scripting
  • Methodology and flow development
  • Digital signal processing

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Veröffentlicht vor 1 Monat

Läuft ab in 3 Wochen

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