Junior FPGA Engineer (All Genders)

About the role

As a Junior FPGA Engineer at STARK, you will join a specialised hardware team developing high‑speed digital logic for autonomous platforms. You will design, implement and test FPGA‑based solutions that process complex signals in real time, working closely with senior mentors.

Key responsibilities

• Develop and maintain high‑speed digital logic using VHDL, Verilog or SystemVerilog.
• Create testbenches and run functional simulations to validate designs.
• Debug hardware with oscilloscopes, logic analyzers and on‑chip tools (ILA/Signal Tap).
• Collaborate with electronics and software teams on pinouts, schematics and interface APIs.
• Integrate and configure third‑party IP cores and high‑speed ADC/DAC interfaces.
• Maintain clear design specifications, register maps and version‑controlled HDL repositories.

Required profile

• Bachelor’s or Master’s degree in Electrical, Electronic or Computer Engineering.
• 0‑2 years of relevant experience (internships or personal hardware projects are valued).
• Curiosity‑driven, resilient in hardware debugging, and able to communicate clearly across teams.

Required skills

• Proficiency in VHDL, Verilog or SystemVerilog.
• Experience with FPGA vendor tools such as Xilinx Vivado or Intel Quartus.
• Familiarity with simulation tools (ModelSim, Questa) and hardware interfaces (AXI, SPI, I2C, UART).
• Competency in Python or C/C++ for scripting and testing.